1. Field of the Invention
The present invention relates in general to a process for making identification alphanumeric markings on mask ROM devices. In particular, the present invention relates to a process for making identification alphanumeric markings on mask ROM devices using a patterned deposited layer in place of a photomask in the process of mask ROM fabrication so as to reduce fabrication costs.
2. Technical Background
Mask read-only memory (ROM) devices are semiconductor memory devices widely used in various digital systems. One of their primary applications is for use as the memory for holding program code and data for microprocessors in digital computer systems. FIG. 1a of the accompanying drawing of the present invention shows the top view of the device area of a typical mask ROM device.
Such a typical mask ROM device of FIG. 1a is constructed over a semiconductor silicon substrate implanted with, for example, P-type impurities. Defined N-type impurity implantation regions in the substrate define the bit lines B/L 3 for the memory cell array of the mask ROM device, which also serve as the source/drain regions for the memory cell transistors. These bit lines B/L 3 are generally parallel configurations formed as long strips as indicated in the drawing. Word lines W/L 4 comprising a gate oxide layer and a conducting layer form another set of parallel configurations that are perpendicular to the parallel configurations of the bit lines B/L 3.
Each region in the substrate that is between two consecutive bit lines B/L 3 below a word line W/L 4 may comprise the channel region 5 for the memory cell transistor of the mask ROM device. The selection of the status of either conduction or blocking of the channel region of a memory cell transistor determines the memory cell data content of either a binary zero or one, or vice versa, depending on the accompanying data sense amplifier (not shown) of the mask ROM device. To bring a channel region of a memory cell transistor into its electrically blocking state, P-type impurities may be implanted into the region. This selective P-implantation is referred to as the code implantation for the mask ROM device. The code implant in the selected transistor channel regions results in an increase of the threshold voltage that blocks the conduction of the transistor channel regions to turn them off.
Most mask ROM manufacturers add visually identifiable alphanumeric markings to the device substrate that contain identification codes for distinguishing the mask ROM substrate from others. This identification code is added to the code mask that contains the selection of the transistor cells to be programmed as blocking, and is made onto the device substrate when the device is factory-programmed. FIG. 1b of the drawing shows the top view of an example of the numeric marking 6, namely the code "007" on the substrate of a mask ROM device.
FIGS. 2 to 4 are the cross-sectional views of the memory device and the alphanumeric markings of the memory cell unit of a mask ROM device selected from the procedural stages in a conventional process of fabrication. FIGS. 2a, 3a and 4a are the cross sections of the memory cell transistor taken along the AA' line in the top view of the typical mask ROM device of FIG. 1a. On the other hand, FIGS. 2b, 3b and 4b are the cross sections of the alphanumeric markings taken along the BB' line in the top view of the "007" marking of the same mask ROM device of FIG. 1b.
To facilitate the program code implantation, as well as the making of the alphanumeric identification markings, the substrate 1 containing the mask ROM memory cells has a photomask layer 14 formed over the surface. The photomask layer 14 reveals the channel regions, as shown in FIG. 2a, for those memory cell transistors to be programmed into the blocking state that are underneath the gate configuration 10. The photomask 14 also reveals the pattern "007" to be marked over the suitable identifying region over the surface of the substrate 1, as is schematically shown in FIG. 2b. The code implanting ion implantation procedure may than be implemented to implant impurities, that is, the code implant 12 into those channel regions revealed. Note that the revealed regions of the pattern of the alphanumeric code marking are also subjected to the ion implantation, carrying additional code implants 12 that are functionless in these patterns.
Then in the process stage of FIG. 3, another photomask layer 16 is again formed to cover those channel regions exposed by the first photomask layer 14, but leaving the pattern for the code marking uncovered, as is shown in FIGS. 3a and 3b respectively. An etching procedure may then proceed to remove a thickness of the substrate 1 along the definition of the code marking pattern. This forms the recessed grooves 18 that shape the code marking "007" in this example.
Finally, in FIG. 4, the two successive photomask layers 14 and 16 are then removed, before the subsequent post process steps of covering BPSG and reflowing, as well as wiring may be implemented. In this prior art example, the alphanumeric code markings are "carved" into the substrate 1 of the mask ROM device.
Such a conventional process of fabricating the alphanumeric code marking, however, involves the use of multiple photomask layers. The code marking requires two photoresist applications, two photo exposures, as well as one etching procedure. The implementation of the second photomask layer, namely photomask layer 16 in the above example, is solely for the purpose of protecting the device area of the mask ROM device when the code marking is being fabricated.